Samsung to Tap TSMC 3-Nanometer Lines for Nvidia Custom HBM
Samsung Electronics will utilize TSMC's 3-nanometer process for the base die of Nvidia's custom NVHBM, according to industry sources. This collaboration aims to address a memory bottleneck in AI chips by enhancing data transfer speeds and expanding High-Bandwidth Memory (HBM) supply, as HBM demand is projected to increase by 91% next year.
The decision for Samsung to work with foundry rival TSMC on a core component of Nvidia's custom HBM illustrates a response to specific technical and supply chain pressures. Nvidia's NVHBM design requires an ultra-fine 3-nanometer logic process for its base die to integrate functions relocated from the GPU, which is intended to improve performance and power efficiency. This advanced process capability, coupled with a high yield rate, appears to be a key factor in selecting TSMC.
TSMC's reported 3-nanometer yield of over 90% is a notable contrast to Samsung Foundry's comparable 2-nanometer SF2 process, estimated at around 60%. For Nvidia, consolidating base die production at TSMC offers greater stability and potential cost efficiency due to the higher yield. This technical distinction helps explain why a direct competitor in foundry services can become a critical partner in memory production.
Beyond technical specifications, the collaboration addresses a projected HBM supply shortfall. UBS forecasts HBM demand to rise by 91% next year, reaching approximately 61.5 billion gigabits, while new shipments are expected to cover only about 54.6 billion gigabits. Samsung's existing base die capacity is reportedly limited, making TSMC's additional 3-nanometer production lines a necessary measure to meet the growing demand for custom HBM solutions like NVHBM.
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