Dnotitia Brings Dedicated Vector Silicon to Server Scale at AI Infra Summit 2026
Dnotitia announced its Vector Data Processing Unit (VDPU) ASIC samples have returned from fabrication. The company showcased a server-scale VDPU architecture at AI Infra Summit 2026. This VDPU is designed for vector retrieval workloads in RAG and agentic AI. Dnotitia plans ASIC-based VDPU evaluations in Q4 2026, targeting up to 10x vector-search performance over CPU-based servers.
Dnotitia’s VDPU ASIC samples are back from the fab. This moves dedicated vector silicon closer to market. The company’s FPGA evaluations showed a four-card VDPU server delivered up to 5.77x the vector-search throughput of a dual-socket CPU server. It also reduced host CPU use by 92% and memory by 73% in a 4,096-dimensional multimodal workload.
This focus on retrieval processing is critical for Asian AI infrastructure. Agentic AI and RAG workloads are shifting bottlenecks from model compute. Companies like South Korea’s Naver or Kakao, heavily invested in AI services, could see significant efficiency gains. They need to free up CPU capacity and GPU HBM for core application and model execution.
The test for Dnotitia is whether its ASIC can hit the targeted 10x performance. ASIC-based evaluations begin in Q4 2026. Broader support for vector libraries beyond FAISS, Milvus, and hnswlib will determine its market penetration. Asian data center operators will watch these performance figures closely.
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